Apollo4 Blue Lite SoC Block Diagram and Peripheral Connections

Block Diagram

This document presents a comprehensive block diagram of the Apollo4 Blue Lite System-on-Chip (SoC), showcasing its architecture and connectivity to various peripheral devices. The diagram highlights the power management system, including USB power input, over-voltage and over-current protection (OVP/OCP), and a Li-ion battery charging circuit managed by the BQ24210DQCT. Power regulation is achieved through BVP62840 buck converters, providing stable voltage rails for different SoC components.

The Apollo4 Blue Lite SoC (AMA4B2KL-KXR) interfaces with a range of sensors, including a PPG/ECG sensor (MAX86176ENX+), a G-Sensor (LSM6DSLTR), a light sensor, and a temperature sensor (MAX30208). Wireless connectivity is facilitated by the ATWINC1500B module, supporting both Bluetooth (BT:2402-2480MHz) and Wi-Fi (WIFI:2412-2462MHz) communication. The diagram also illustrates connections to external memory, such as EMMC and PSRAM, and a TFT Amoled display. Load switches (GLF71301) are used for power control of specific peripherals. The diagram provides a clear overview of the system's architecture and interconnections, aiding in design and debugging efforts.


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tags: ["Apollo4 Blue Lite", "AMA4B2KL-KXR", "BVP62840", "FPF2286UCX", "BQ24210DQCT", "GLF73915", "GLF71301", "MAX86176ENX+", "ATWINC1500B", "LSM6DSLTR", "MAX30208", "BT:2402-2480MHz", "WIFI:2412-2462MHz"]
Array
(
    [0] => Array
        (
            [url_sha] => f471292fb467f119437b47b2b9f3964de816ddbf6115d222ae758178f3425a21
            [source] => fccid
            [url] => https://apps.fcc.gov/eas/GetApplicationAttachment.html?id=8092459
            [href_text] => Block Diagram
            [href_description] => Shenzhen VastDo Technology CO.,Ltd SWWBV01 SleepWatch 2BLGK-SWWBV01 2BLGKSWWBV01 swwbv01
            [http_status] => 200
            [http_lastmod] => 0000-00-00 00:00:00
            [http_contenttype] => application/pdf
            [http_filename] => GetApplicationAttachment.html?id=8092459
            [http_size] => 204509
            [file_sha256] => 07b16de3e708b3eb384eac8d5043a55a2f7ff053ba13bbb99181eb38ffb77a72
            [domain] => document.fccid
        )

)
Array
(
    [file_sha256] => 07b16de3e708b3eb384eac8d5043a55a2f7ff053ba13bbb99181eb38ffb77a72
    [cleanFccId] => 2BLGKSWWBV01
    [title] => Apollo4 Blue Lite SoC Block Diagram and Peripheral Connections
    [description] => A detailed block diagram illustrating the Apollo4 Blue Lite SoC, its power management, and connections to various peripherals and sensors. Includes USB, battery management, and wireless connectivity.
    [brand_name] => Ambiq Micro
    [keywords] => ["Apollo4 Blue Lite", "AMA4B2KL-KXR", "BVP62840", "FPF2286UCX", "BQ24210DQCT", "GLF73915", "GLF71301", "MAX86176ENX+", "ATWINC1500B", "LSM6DSLTR", "MAX30208", "BT:2402-2480MHz", "WIFI:2412-2462MHz"]
    [intro] => 

This document presents a comprehensive block diagram of the Apollo4 Blue Lite System-on-Chip (SoC), showcasing its architecture and connectivity to various peripheral devices. The diagram highlights the power management system, including USB power input, over-voltage and over-current protection (OVP/OCP), and a Li-ion battery charging circuit managed by the BQ24210DQCT. Power regulation is achieved through BVP62840 buck converters, providing stable voltage rails for different SoC components.

The Apollo4 Blue Lite SoC (AMA4B2KL-KXR) interfaces with a range of sensors, including a PPG/ECG sensor (MAX86176ENX+), a G-Sensor (LSM6DSLTR), a light sensor, and a temperature sensor (MAX30208). Wireless connectivity is facilitated by the ATWINC1500B module, supporting both Bluetooth (BT:2402-2480MHz) and Wi-Fi (WIFI:2412-2462MHz) communication. The diagram also illustrates connections to external memory, such as EMMC and PSRAM, and a TFT Amoled display. Load switches (GLF71301) are used for power control of specific peripherals. The diagram provides a clear overview of the system's architecture and interconnections, aiding in design and debugging efforts.

)
Array
(
    [0] => Array
        (
            [id] => 8092459
            [file_sha256] => 
            [applicationId] => FghHGoTj3xGsEf37fUeKGA==
            [description] => Block Diagram
            [shortTermConfidential] => No
            [permanentConfidential] => No
            [supercede] => No
            [exhibitType] => Block Diagram
            [fileType] => Adobe Acrobat PDF
            [displayType] => pdf
            [fileSize] => 204511
            [submissionDate] => 2025-03-04 00:00:00
            [dateAvailable] => 2025-03-04 00:00:00
            [creationDate] => 
            [producer] => 
            [modDate] => 
            [title] => 
            [creator] => 
            [author] => 
            [pages] => 
            [realSize] => 
            [html] => 0
            [png] => 0
            [txt] => 0
            [version] => 1
            [source] => 0
            [fccId] => 2BLGK-SWWBV01
            [cleanFccId] => 2BLGKSWWBV01
            [exif] => 0
        )

)